Amplitude distribution analyzer



3 Sheets-Sheet l Filed April 8, 1957 E, infill).

4T ramvs vs C. S. CARNEY AMPLITUDE DISTRIBUTION ANALYZER Sept. 22, 1959 3 Sheets-Shea?I 2 Filed April 8, 1957 LDDHDQ o QIWMEIL.

. ow o sommi INVENTOR. CHARLES 5. CARNEY Arron/VE 91s Sept. 22, 1959 c. s. CARNEY AMPLIIUDI: DISTRIBUTION ANALYZER 3 Sheets-Sheet 3 Filed April 8, 1957 XQQT.

INVENTOR. CHARLES 3. CARNEY BYWad/M Armelle-va United States Patent O y p y2,205,381;

DISTRIBUTION ANALYZER GllarlesnS. Carney. Marion, Iowa, assiguor to Collins Radio Company, Cedar Rapids, Iowa, a corporation oflowa .Application April- 8, 195'1, Serial No. 651,502 v 'll Claims. (ci. 32A- 68) lsignal is exceeded a given percentage of time are required.

Such computations or analyses involves three variables: the vamplitude exceeded, the absolute time, and the percentage of time. Amplitude exceeded may be-expressed in decibels or microvolts. Time may be expressed in days, hours, or minutes, whilepercentage of time has no units inasmuch as it is a pure ratio. In the prior computation methods it has been necessary to assign arbitrary constant values to one of these variables while the other two are continuously varied. Thisl same assignment of values has been carried'out in one'embodiment of this invention. 'lhe output from vthe distribution analyzer of this invention VVisusually expressed in twofdimension configuration "graphical form in which thepercentage of time has been lheld' constant at an arbitrary position value while the signal value exceeded and the absolute time are varied. Fora vdetailed explanation of amplitude distribution analysis, seethe article by =Irvin H. Gerks in the November ll9 5l issue of the Proceedings of the lInstitute of Radio Engineers entitled Propagation at 412 Megacycles From VA High Powered Transmitter.

"This invention provides an amplitude distribution analyzer which will automatically analyze the distribution of random amplitude variations of an input signal. Ihis invention is generally utilized in connection with a recording oscillograph. This Vinvention may also be utilized with -a correlator which determines the relationship between two random input signals and indicates the information on a meter. The recorder and the correlator devices are well known in 'the art and will not be described herein.

.lt is an object of this invention to provide a stable and compact amplitude distribution analyzer. It is a further object of this invention to provide an economical means of'analyzingtransmission loss despite rapid fluctuations of the range ofamplitudes of the signal. It is a still further object-of this invention to provide an amplitude distribution analyzer capable of computing simultaneously vediscrete signal levels which are exceeded at a chosen percent of an absolute time value. It is another object 'of this invention to provide an `amplitude distribution analyzer which minimizes stability errors and yet retains ,good reliability. 'It .is .still another object of thisinven- ,tion to provide .an .amplitude distribution analyzer which a more .rapid response time than prior analyzers,

These and other objects of this invention will become lapparerht when -thevfollowing description is lread in v,con-

junction with the accompanying .drawings :in which,

Figure l is a block diagram of one embodiment of the analyzer of this invention,

Figure 2 is a detailed schematic diagram of a portion of one embodiment of' this invention, and

Figure 3 is a detailed schematic diagram of the remaining portion of one embodiment of this invention.

Referring now to Figure l, the input signal is applied to the 400-cycle chopper 11. This input signal is shown as coming from a distribution channel and is actually a voltage from an automatic volume control of an associated receiver which is a measure of field strength. This input signal is compared in the 40G-cycle chopper 11 with the threshold output voltage which comes from the threshold switch 23. This chopper is operated by a 400- cycle signal which is obtained from a commercially available 40G-cycle power supply. lf there is a dilerence in potential between the input signal and the threshold voltage applied to the chopper 11, a 40G-cycle square wave output signal is generated by the chopper 11.

This square wave output signal is applied to the input amplifier 12 and the amplified output from the amplifier 12 is applied to the phase detector 13. The phase detector 13 chooses one of two output signals which are connected to two windings on the integrator timing relay 14. The integrator timing relay also receives direct current signals of a predetermined voltage ratio from the percentile level selector 15. The output from the integrator timing relay, which is a combination of the difference in amplitude between the input signal voltage and the threshold voltage, and the voltage ratios applied by the percentile level selector is applied to integrator circuit 16. This integrator circuit generates an error voltage which is applied to the 60-cycle chopper 17.

The output sig-nals from the integrator timing relay are also applied to the correlator without passing through the integrator circuit. This means that the input signals from `two of these percentile computer channels are applied to the correlator while `the relationship between these input signals is determined.

The 60-cycle chopper 17 generates a 60-cycle square wave output signal which is amplified in error amplifier 18 and applied to the phase detector 19. When the'error voltage which is applied to the chopper 17 reaches a predetermined level, the phase detector energizes one of the phase positioning relays 20 and 21. The phase positioning relays 2i? and 21 will be selectively energizedV depending upon the polarity of the dii-ference of the error voltage which has corne from the chopper 11.

When either of the phase positioning relays are energized, fa first set of contacts shorts the error ysignal to ground so that the analyzer may once again begin to generate a new error signal. This v rst error signal is utilized to energize the desired phase positioning relays thereby closing contacts to apply `a voltage to atuate the stepping switch 22. The stepping switch 22 is a bi-directional stepping switch, and energization of relay 20 steps .switch 22 in one direction While energization of relay 21 steps switch 22 in the opposite direction.

Mechanically coupled to the switch 2 2 are two sets of switch contacts, the threshold switch 23 and the punched card information switch 24. The threshold switch 23 is connected to a source of direct current voltage and cons-ists of a plurality of resistance elements so that for each position a different threshold output voltage is generated. This new output voltage is then applied tovthe chopper 11 for comparison with the signal input.

The' punched card information switch 24 is utilized -to 4'provide Vcard punching information so that a perma- -nent percentile signal record may be kept in card-tile Afor-m.

This invention provides a self-correcting threshold con- .dition which is more precise and results in better stability 3 of the operating circuit than an arbitrary ladjusting threshold voltage.

Referring now to Figures 2 and 3, a detailed circuit diagram of one embodiment of this invention is depicted. The input voltages applied to one of the contacts of the L1GO-cycle chopper 11 are indicated as having a value of from zero to ten volts. This input signal once again, as described above, comes from a receiver and generally from the automatic volume control circuit of this receiver. rI'he other Contact of this chopper 11 has the threshold output voltage applied thereto. The relay coil on chopper 11 has a 40G-cycle voltage applied through resistance 31 and capacitance 32. This resistance and capacitance network serves as ya phase shifting circuit for the 40G-cycle voltage and synchronizes the 40G-cycle voltage applied to the chopper 11 with the 40G-cycle voltage applied to the plates of the phase detector 13. The output voltage from the chopper 11, which is a 40G-cycle square wave depending upon the difference in potential between the signal inout and the threshold output voltage, is applied to the grid of theamplifier 12.

The output signal from the amplifier 12 is coupled bv the transformer 33 to the phase de-tector 13. The resistance elements or potentiometer 34 in the common cathode circuit of the phase detector 13 may be adjusted to balance the two `sections of the phase detector. The plate circuits of the phase detector include the windings 35 and 36 of the polarized timing relay 14. Relay 14 may be a single-pole, double-throw relay whose movable arm maintains contact with one of the fixed contacts until the movable arm is pulled to the opposite contact by the positive action of the other winding. The polarized windings are energized when the signal input differs from the threshold output voltage by a value of at least lm of a volt. The operation `of the foregoing circuit can be explained if it is assumed that when the 400 supply v-oltage on chopper 11 is on the positive half of its cycle the relay portion is making contact with the input contact 58, and also if it is `assumed that the input voltage is higher than the threshold voltage. Under the above set of assumptions, the output voltage from the chopper 11 will be in phase with the 400 supply Voltage.

Tube portions 12a and 12b amplify the square wave as a standard resistance coupled amplifier. The sign-al from armature 57 will pass through capacitor 60 to the grid 561 of tube portion 12a. The ampliiied signal from plate 51 of tube portion 12a passes to the grid 52 of tube portion 12b and is further amplified and finally appears across the secondary of transformer 33. Because the center tap `of the secondary of transformer 33 is grounded, the output on grid 54 of tube portion 13a would be in phase with the 400 supply voltage and the output on grid 55 would be 180 out of phase. Since the 400 supply voltage is also impressed on each of the plates 56 `and 61 of tube 13, tube portion 13a will conduct because both grid 54 `and plate 56 `are positive during the positive half of the 40() cycle supply voltage and will energize winding 36 of relay 14. However the tube portion 13b will not conduct since its grid will be going negative during this portion of the cycle. During the last half of the cycle, neither tube portion will conduct `since both plates will be negative.

If the input 58 to the chopper 11 were more negative than the threshold voltage, a 180 out-of-phase square wave voltage will be developed, subsequently amplied. and yapplied to phase detector 13. However, the phase of the square wave voltages on the grids would be reversed, hence tube portion 13b would conduct, energizing winding 35 of relay 14.

Thus amplifier 12 in cooperation with phase detector 13 and integrator timing relay 14, will select from voltage selector switch 15 a preset positive or negative voltage which depends upon the relationship of the phase between the 400 supply voltage yand the phase of the square wave voltage developed by the chopper 11. A negativ@ 4 direct current vol-tage is applied to ione fixed contact 37 of the relay 14 and a positive direct current voltage is applied to the other fixed contact 38 of relay 14. Tlhe ratio between these positive and negative voltages is determined by the percentile level switch 1S. This switch includes -two voltage divider networks which apply xed voltage ratios to the contacts of the relay 14. In one embodiment of this invention, if the percentile level selected by switch 15 were 20 percent, then the negative voltage would be volts and the positive voltage would be 12.7

volts.

If the signal input is more negative than the threshold output voltage by at least 17400 of a volt, themovable arm of the timing relay 14 willrbe pulled to the negative contact 38. The output of relay 14 will consist of positive and negative voltages whose amplitude is determined by the percentile level voltage selector switch 15 whose duration is determined by the uctuations of the input signal voltage above and below the threshold output voltage. The output from relay 14 is connected directly to the correlator referred to above, and is shown as the output connection 40. Also, the output signal from the relay 14 is applied through resistance 41l and capacitance 42 by the line 43 to the iixed contacts of the 60-cycle chopper 17. The relay coil of the 60-cycle chopper is fed from an isolated volts, 60-cycle alternating current source not shown. This source of voltage is commercially available and will not be described further herein. The resistance 41 yand thevcapacitance 42 constitute an integrator circuit which will determine the error voltage. The error voltage is a representation of the error in the threshold output voltage.

The integrator circuit determines the percentage level by determining the charge over a certain vperiod of time on the integrating capacitor 42. The integrating circuit of this invention is based on the premise that for a given percentile level the voltage across y the integrating capacitor can be made to equal zero. This may be accomplished by Vcharging the capacitor.l in a positive direction duringv the time the input signal is above the threshold voltage and charging the capacitor in a negative direction during the time .the input signal is below the threshold voltage. In the particular embodiment ofthis invention which was caused to be constructed, it was arbitrarily determined that the charging and discharging voltages on the capacitance would be a positive 45 volts and a negative 45 volts at the SO-percentile point. It was further arbitrarily determined that for all percentiles above 50 percent the positive voltage would be 45 volts and the negative voltage some value greater than 45 volts. Conversely, for all percentiles below 50 percent the negative voltage would be 45 volts and the positive voltage some greater value. The voltages required for each percentile level may be determined from the following relationship:

E -l' T The quantity of charge .Q accumulated on the capacitor 42 is equal Ato the current times the time the current is applied. This may be expressed as, `Q---IT.-The resistor and the capacitor in the integrating circuit are normally large in value. The large resistance furnishes a current to the capacitor 42 which is proportional to the applied voltages. If the voltages applied to the integrating circuit are in the form of square wave pulses having durations of predetermined time, the quantity of charge accumulated `on the capacitor -42 may be determined by mathematical analysis. If the positive charge equals the negative charge over a period of time, it is obvious that the total charge is zero. With the voltage across the capacitance known to be proportional to the accumulated charge on the capacitor, the accumulated voltage will also be zero.

The ratios of the voltage amplitudes are determined by th@ percentile level selected. The time duration that these signals are applied are :determined .by-the length of time that the signal input voltage is above or below the threshold output` level. The voltage accumulated on the capacitor 42 is called the error voltage and is a representation of the `error in the thresholdoutputvoltage. In the specic embodimenttconstructed, the loading effects of the chopper- 17 `or-the `integratingnetworkare minimized by keeping its operating part close to ground potential. l

The output signal from the integrating network is applied .to the fixed contacts ofthechopper 17.. The 60- cycle voltage is applied to the chopperk through the phase shifting network consistingoffresistance 44 and capacitance 45. This is to synchronize-the supply voltage applied to the relay coil of thefchopper 17 with the supply voltage applied to the .phase detector 19. The output signal from the chopper 17 is applied to the grid of the error signal amplifier. 18 andthe amplified output signal is coupled to the phase detector 19 by the transformer 46. This phase detector 19 has a potentiometer 47 in the common cathode circuit to vpermit adjusting the sensitivity and the balance-of the phase detector 19.

The plate circuits ofv phase detector 19 each include a relay winding of the individual phase `positioning relays 21 and l20. Each of these phase .positioning relays includes a plurality of fixed contacts. When the integrator output voltage reaches a predetermined value, the phase etector 19 will energize the winding of one of the phase positioning relays. One set of the fixed contacts 21a or 20a on the respective. phase vpositioning relays shorts the error signal to ground. The second` set of xed contacts 2lb and 20b on the respective phasepositioning relays operates as a series switchand energizes the relay coil of the stepping switch 22. AThis .means that the energizing voltage is appliedL from the contact 48 through the xed contacts 2lb or 20h vto .the windings of the stepping switch 22. .I

The stepping switch V22( is Vmechanically linked to the punch card information switch 24and the threshold switch 23. The threshold switch 23is a voltage divider cirkcuit and applies a diierent threshold voutput voltage to the 40G-cycle chopper for each setting of the switch. The threshold output voltage from the divider circuit,23 is also applied to the automatic timer which is not a part of this invention.

It is seen that the phase detector 19 will operate phase positioning relays 21 or 20 depending upon the -polarity of the error signal developed and applied to the chopper 17. Thus, the direction of movement of the stepping switch is controlled. The stepping switch controls movement of .the threshold voltage divider circuit. If the threshold voltage has been too small for stable vcomparison with the input signal, this computer automatically adjusts the threshold voltage to .the proper value for comparison with the input signal.

Although this vinvention has been described with respect to a particular embodiment thereof, it is not to be so limited as changes and modifications may be made ltherein which are within the full intended scopelof the invention as defined by the appended claims.

What is claimed is:

l. An amplitude distribution analyser for analyzing a signal to determine the percentage of time that a selected amplitude is exceeded by the signal comprising comparator means for comparing the Signal with a rst reference voltage, means for generating said rst reference voltage, phase detector means connected to the output of said comparator means to determine the phase of the output signals from said comparatortmeans, timing means, means for synchronizing said comparator means with said phase detector means, means for Agenerating a second reference voltage, said second reference voltage and the output signals from said phase detector means connected to said timing means; said timing means producing output signals whose polarity, amplitude and duration are determined by the input signals to said timing means; integrator means connected to said timing means for integrating the output signals from said timing means over a predetermined period of time, and means responsive to the output singals from said integrating means for varying said first reference voltage whereby an amplitude analysis of the signal in terms of the amplitude exceeded by the signal a given percentile of time is continuously generated.

2. An amplitude distribution analyser for analyzing the amplitude of an input signal which is exceeded a predetermined percentile of time comprising comparator means, said comparator means receiving said input signals and first reference voltage signals, said rst reference voltage signals generated by a first voltage generating means, output signals generated by said comparator means when said input signals and said first reference voltage signals are of dissimilar potentials, phase detector means detecting the phase of the output signals from said comparator means, timing means, a second source of reference signal voltages, a selected one of said second reference signal voltages and the output signals from said phase detector means connected to said timing means; said timing means generating from said input signals output signals comprising voltage pulses having varied polarity, amplitude and duration; integrator means connected to said timing means, said integrator means integrating output signals from said timing means over a predetermined time interval, and means including switch means responsive to the output from said integrator means for varying said first reference voltage signal generating means to provide an analysis of said input signal proportional to the amplitude exceeded by said input signal a given percentile of time.

3. An amplitude distribution analyser for analyzing the amplitude which is exceeded by an input signal a selected percentage of time comprising a irst comparator means, means for generating first reference voltage signals, said signals having Variable amplitudes, said first reference voltage signals and said input signals connected to said first comparator means, said rst comparator means producing an alternating current output signal of a predetermined frequency, a phase detector, means for synchronizing said phase detector with said first comparator means, the output signals from said rst comparator means connected to said phase detector, said phase detector generating output signals dependent upon the phase of the output signals from said iirst comparator means, means for generating second reference voltage signals, timing means, the output signals from said phase detector and said second reference voltage signals applied to said timing means; output signals generated by said timing means in the form of pulses whose polarity, amplitude and duration are variable; said output signals from said timing means connected to a first integrator means, said first integrator means integrating said output signals from Said timing means over a predetermined period of time to produce a control signal voltage; and means including a second comparator means, a second phase detector means, and switch means responsive to said control voltage signals for varying the amplitude of said first reference voltage signals whereby an analysis of said input signal in terms of the percentage of time that the input signal exceeds a preselected amplitude is generated.

4. An amplitude distribution analyser for analyzing an input signal in terms of the percentage of time said input signal exceeds a preselected amplitude comprising a first comparator means, means for generating a first reference signal voltage, said rst reference signal voltage being Variable in amplitude, said first comparator means including input means connected to said input signal and said rst reference signal Voltage, output signals from said first comparator means being alternating current signals of a selected frequency, a first phase detector, said rst phase detector receiving said output signals from said first comparator means as input signals and generating therefrom output signals dependent upon the phase of said input signals, means for generating a plurality of second reference signal voltages, a desired one of said second reference signal voltages being selectively chosen, a timing means, said chosen second reference signal voltage and said output signals from said first phase detector applied to said timing means; said timing means generating output signals having variable polarity, amplitude and duration; integrating means, the output signals from said timing means connected to said integrating means, said integrating means integrating said output signals from said timing means over a predetermined period of time thereby generating a control signal; and means responsive to said control signal comprising a second comparator means, a second phase detector means, and phase positioning relays and switches to vary the amplitude of said first reference signal voltage whereby an accurate analysis of the input signal voltage in terms of the percentage of time that said voltage exceeds a given amplitude is generated.

5. An amplitude distribution analyser for analyzing an input signal in terms of percentage of time said input signal exceeds a selected amplitude comprising a first comparator means, means for generating a first reference signal voltage, means for varying the amplitude of said first reference signal voltage, said first comparator means including input means, said input signal and said first reference signal voltage connected to said input means, output signals from said first comparator means being alternating current signals of a selected frequency, a first phase detector, said first phase detector receiving the output signals from said first comparator means as input signals and generating therefrom output signals dependent upon the phase of said input signals, means for generating a plurality of second reference signal voltages, means for selectively choosing a desired one of said second reference signal voltages, said chosen one of said second reference signal voltages correlated to the desired percentage of time for said analysis, a timing means, said selectively chosen second reference signal voltage and said output signals from said phase detector connected to said timing means; said timing means generating output signals having a variable polarity, amplitude and duration; integrating means, the output signals from said timing means connected to said integrating means, said output signals from said timing means also being selectively connected to means for determining the relationship of two random input signals, said integrating means integrating said output signals from said timing means over a predetermined period of time thereby generating a control voltage; and means responsive to said control signal comprising a second comparator means, a second phase detector means, and phase positioning relays and switches to actuate said means for varying the amplitude of said first reference signal voltage whereby an accurate analysis of the input signal voltage in terms of the percentage of time that said voltage exceeds a given amplitude is generated.

6. An amplitude distribution analyser for analyzing an input signal in terms of percentage of time said input signal exceeds a selected amplitude comprising a first comparator means, means for generating a first reference signal voltage, means for varying the amplitude of said first reference signal voltage, timer means, said first reference signal voltage connected to said timer means, said first comparator means including input means, said input signal and said first reference signal voltage connected to said input means, output signals from said first comparator means being alternating current signals of a selected frequency, a first phase detector, said first phase detector receiving the output signals from said first comparator means as input signals and generating therefrom output signals dependent upon the phase of said input signals, means for generating a plurality of second reference signal voltages, means for selectively choosing a'- desired one of said second reference signal voltages, said chosen one ofV said second lreference signal voltages correlated to the desired percentage'of time for said analysis, a timing means, said selectively chosen second reference signal voltage and -said output signals from said phase detector"connected-to said timing means; said timing means generating output signals having variable polarity, amplitude and duration; integrating means, the output signals from said timing means connected to said integrating means, means for selectively connecting said output signals from said timing means to means for determining the relationship of two random input signals, said integrating means integrating said output signals from said timing means over a predetermined period of time thereby generating a control signal; and means responsive to said control signal comprising a second comparator means,.a second phase detector means, an information recording means, and phase positioning relays and switches to actuate said means for varying the amplitude of said first reference signal voltage and to actuate information recording means for recording the changes in the first reference signal voltage whereby an accurate analysis of the input signal voltage in terms of thel percentage of `time that said voltage exceeds a given amplitude is generated as said first reference signal voltage.

7. An amplitude distribution analyser for analyzing an input signal in terms of percentage of time said input signal exceeds a selected amplitude comprising a first comparator means, means for generating a first reference signal voltage, means for varying the amplitude of said first reference signal voltage, timer means, said first reference signal voltage connected to said timer means, said first comparator means including input means, said input signal andsaid first reference signal voltage connectedto said input means, output signals from said first comparator means being alternating current signals of a selected frequency, a first phase detector, said first phase detector receiving the output signals from said first comparator means as input signals and generating therefrom output signals dependent upon the phase of said input signals, means for generating a plurality of second reference signal'voltages, means for selectively choosing a desired one of said second reference signal voltages, said chosen one of said second reference signal voltages correlated to the desired percentage of time for said analysis, a timing means, said selectively chosen second reference signal voltages and said output signals from said phase detector connected to said timing means; said timing means generating output signals having variable polarity, amplitude and duration; integrating means, the output signals from said timing means connected to said integrating means, means for selectively connecting said output signals from said timing means to means for determining the relationship of two random input signals, said integrating means integrating said output signals from said timing means over a predetermined period of time thereby generating a control signal; and means responsive to said control signal comprising a second comparator meansA producing an alternating current signal of a selected frequency, a second phase detector means, and phase positioning relays and switches to actuate said means for generating the amplitude of said first reference signal voltage whereby an accurate analysis of the input signal voltage in terms of the percentage of time that said voltage exceeds a given amplitude is generated as said first reference signal voltage.

References Cited in the file of this patent UNTTED STATES PATENTS 2,079,064 Burr-ill May 4, 1937 2,641,931 Wild lune 16, 1953 2,715,209 Williams Aug, 9, 1955 2,765,703 Ward Oct. v9, 19,56 

